Only Intel has the most advanced processor on the planet. And we already know what exactly he will do about it.

ASML is currently preparing to ship its second high-aperture extreme ultraviolet (EUV) lithography equipment (High NA) to one of his clients. We still don’t know his identity, but we do know that he is currently the only semiconductor manufacturer that has already installed one of these very complex and very expensive machines at one of its factories it is Intel. In fact, it is in the testing phase at its plant in Hillsborough (USA).

Just a few hours ago we attended a technical session held by the Intel engineers who operate this machine, and they told us some very interesting things. However, before we get into trouble, it’s worth taking a quick look at what we have at hand in this article. High aperture EUV lithography equipment like the one Intel has in Hillsboro weighs as much as two Airbus A320s and includes more than 100,000 parts, 3,000 cables, 40,000 bolts, and more than 2 km of electrical connections.

Each one costs €350 million, and ASML engineers have invested ten years in developing the technology needed to develop this machine, which is actually used extreme ultraviolet (EUV) lithography equipment. Another interesting note: ASML sent this equipment to Intel, whose commercial name is DVINSCAN EXE:5000, packed in more than 250 boxes, which were placed in 43 shipping containers. They flew to Seattle on several cargo planes and were transported from there to their final location in Oregon in 20 trucks. A real odyssey.

Intel has a very ambitious plan to take advantage of high aperture SVU machines.

Intel engineers are currently in the process of calibrating the first high-aperture UVE equipment that has passed through their hands. Presumably, in the coming months, this American company will purchase more machines of this type from ASML, because, as we can guess, one will be completely insufficient to meet its production needs for highly integrated semiconductors. In fact, ASML plans to supply around 20 devices of this type to its customers annually, starting in 2025.

To develop high aperture UVE lithography equipment, ASML engineers developed a very advanced optical architecture that Has an aperture of 0.55. compared to the value of 0.33 found in first-generation UVE lithography equipment. This improvement in optics allows higher-resolution patterns to be transferred to the wafer, allowing chips to be produced using more advanced integration technologies than those currently used in 3nm nodes.

In the article dedicated to the Rayleigh criterion, we explain in great detail what the parameter “NA” consists of (numerical aperture), but for the purposes of this text it is enough for us to know that this variable identifies the aperture value of the optics used by the lithography equipment. In this context, this parameter essentially reflects the same thing as the aperture value when we talk about camera optics, so it determines the amount of light that the optical elements are capable of collecting. As we can guess, the more light they collect, the better.

However, that’s not all. ASML has also improved the mechanical systems responsible for wafer processing so that a single high aperture UVE machine can produce more than 200 waffles per hour. The cover photo of this article gives us a sense of the extreme complexity and sophistication of one of these devices, which, incidentally, would not have been possible without the collaboration of other companies such as the German ZEISS or the American company Cymer. origin, which is now firmly ingrained in the ASML structure.

The slide we’re sharing below outlines the path Intel has set out to 2027 and contains something very interesting: In 2025, it will begin conducting the first product tests using UVE high-aperture lithography equipment. The first integrated circuits made on this machine will come out of the 14A node in 2026, and in 2027 Intel will release a supposedly improved version of this node, called 14A-E. These two nodes will mark the start of chip production using ASML’s new UVE and high aperture lithography equipment.

Intel believes UVE’s high-aperture lithography equipment will help IC manufacturers who choose it to comply with Moore’s Law longer. Both ASML and Intel say the machines were designed to help semiconductor manufacturers improve the resolution of their lithography processes. without increasing complexity. In practice, this quality should have a noticeable impact on increasing hardware performance and at the same time reducing the cost of chips.

The next slide summarizes the strengths of high-aperture UVE lithography hardware, according to Intel: Lithography processes will become simpler and require fewer intermediate steps; new mask technology will match the increase in resolution; It will be possible to control the operation of each machine, optimize its performance, etc.

In any case, the interesting thing is that it is theoretically much easier, more efficient and cheaper to produce highly integrated semiconductors using high aperture UVE equipment than using multiple drawing on a less advanced lithography machine. In general, this method involves transferring a pattern onto a wafer in multiple passes to improve the resolution of the lithographic process. This may result in higher chip costs and lower production capacity, but it works.

The next slide shows how lithography has improved over the past four decades. The development of this technology over time has been impressive, but to understand its impact in all its magnitude, we are interested in exploring the equation that acts as ASML’s bible. It was the Rayleigh criterion that I mentioned a few paragraphs above. You can see the equation in the lower left corner of the slide, it contains all the parameters that determine the performance of the lithography equipment used to produce integrated circuits.

This may seem like a complicated formula at first glance, but it’s actually not that complicated if we know what each of the terms in the equation represents. I propose to consider them one by one from left to right. The first of these, “CD”, comes from the English expression critical dimensionand determine to what extent can be miniaturized components that make up an integrated circuit.

As we can guess, this is a parameter that semiconductor manufacturers want to reduce at any cost. In fact, all of them, and especially ASML, devote a huge amount of resources to developing technologies that allow us to refine the critical dimension, which encourages us to look at the expression we have on the right side of the mathematical equation. .

The “k₁” coefficient is a coefficient that is determined by the physical parameters that govern the semiconductor manufacturing process. It is interesting for us to keep in mind that the physical limit imposed by silicon photolithography is ‘k₁ = 0.25’therefore, as you can guess, manufacturers are doing everything possible to improve their technology and bring this coefficient as close as possible to this limit value.

The next parameter, denoted by the Greek letter lambda (“λ”), tells us what wavelength of light is used in the semiconductor manufacturing process. One of the most important challenges facing the companies we talk about is precisely reducing the wavelength of light in order to increase the resolution of the photolithographic process.

However, each step along this path requires the development of new lithographic equipment, new light sources (usually ultraviolet), new optical elements, new photoresist materials, and new production technology. In short, every time a plant reduces the wavelength of light it projects onto its plates, it is forced change the most its equipment and production process.

The last recipe ingredient that interests us is the “NA” parameter (numerical aperture), which determines the aperture value of the optics used by the lithography equipment. Finally, the conclusion we can draw from analyzing the information provided by the Rayleigh criterion is that in order to increase the resolution of their photolithographic process, semiconductor manufacturers are forced to refine the three parameters that coexist in the expression of the right-hand side of the Rayleigh criterion. the equation.

The last Intel slide we’re going to look at contains some interesting clues. The first thing to note is that the high aperture UVE lithography equipment that Intel has in Hillsboro It’s already fully assembled. The ultraviolet radiation source is ready for use, and the mirrors that make up the machine’s most complex optical unit are already centered.

Intel engineers will be able to launch the machine and conduct the first tests at the end of this year, and, as we see, preliminary tests on the manufacture of integrated circuits in node 14A will begin in 2025. It sounds exciting. We’ll be keeping a close eye on this car to keep you updated on all the progress.

Images | Intel

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